Integrated circuit device having large numbers of memory cells can physically divide such cells into to separately accessible groups, such as blocks. In many conventional devices of this sort, data values are applied and received from such blocks according to a uniform data format convention. That is, a data value applied to (or received from) one block has the same format as that of the other blocks. One particular type of memory cell block arrangement can be those based on content addressable memory (CAM) cells.
CAM cell memory blocks can enable rapid searching operations between a received search data value (i.e., compare data value or comparand) and stored data values residing in the CAM cell blocks. In a typical CAM cell based device, during a search operation, a compare data value can be applied to multiple blocks in the same general fashion to generate search results for such blocks. For example, a typically N-bit compare data value can be applied as N compare data line pairs, where each compare data line pair can be driven to complementary values according to a corresponding bit of the compare data value. Thus, in response to N compare data values, N compare data lines can be activated. Similarly, in a typical write operation, a data value can be written into a CAM block storage location in the same general fashion, regardless of block.
U.S. Pat. No. 7,133,302 issued to Srinivasan et al. on Nov. 7, 2006 shows a low power content addressable memory. The low power CAM device of Srinivasan et al. can receive an N-bit comparand value, and in response, activate less than N compare lines within the CAM device. This can reduce power over conventional CAM arrangements.